International Centre for Graduate Education in Micro & Nano Engineering

Semiconductor Processes 2

This module introduces students advanced CMOS process technology and the problems associated with the device fabrication as the technology moves towards 30 nm features and below. 

General information:

1. Semiconductor Processes 2 module is available in second semester 2011/2012 academic year.
   
2. Host Institution: University of Limerick
3. Delivery mode:

• for Limerick located students: on-site in UL, 2 hours lectures per week and 1 hour of tutorial per week.
• for students from other locations: Intensive block delivery mode, 1 week on-site in UL plus course materials available online via ICGEE VLE.

Course content:

• CMOS process flow: CMOS fabrication steps, active region formation, shallow trench isolation, n and p well formation. Gate formation: threshold voltage, control of Vth in n and p channel MOS devices, tip or LDD formation (hot electrons), sidewall spacer.
• Source and drain formation: contact and interconnect formation, multilevel metal formation for ULSI, RC time delay. Surface contaminants: particles, metallic contaminants, organic contaminants, native/chemical oxide, and moisture.
• Cleaning processes: surface characteristics, wet cleaning, dry cleaning, supercritical fluid cleaning, and lamp cleaning-surface refreshing. Cleaning /Etching Chemistries]: contamination reduction, gettering (intrinsic and extrinsic).
• Chemical Mechanical Polishing (CMP): SiO2 inter-level dielectric layers planarization, tungsten plug formation and shallow trench isolation. Dual Damascene: trench first approach, via first approach, optical proximity correction.
• High and low K dielectrics: silicon on insulator, ultra thin oxides, gate dielectrics, degradation mechanisms, nitroxides, fluorinated oxides, shallow junction formation, transient enhanced diffusion.
• Electrostatic discharge (ESD): basics of ESD, principles of ESD control. Semiconductor Metrology: CD and overlay measurements, electrical and optical measurements. Assembly: front-end assembly and backend assembly.
• Semiconductor failure analysis: implant metrology; interconnect process metrology, Ellipsometry, reflectrometry, sheet resistance measurements

 Semiconductor Processes 2 - Module Descriptor

Semiconductor Processes 2 - Lecturers:

Dr. Arousian Arshak

Lecturer,
Department of Physics & Energy
University of Limerick

Research Interests:

• Ion Bombardment in Solid-State Materials; Dry etching of Semiconductors, (Si, Ge, Ga As) and Photoresists (Oxygen Plasma Etching);
• Oxidation and Diffusions for VLSI Processing;
• Optical lithography using I-line exposure tools;
• Design of experiments for process optimisation in VLSI;
• Development of Phase-Shift Masks for sub-micron lithography;
• Modelling and Simulation of Optical Lithography Processes and Wet / Dry Etching of Photoresists;
• Development of Top Surface Imaging Processes (DESIRE, PROMOTE, PRIME) using both gas- and liquid-phase silylation;
• Development of Advanced Silylation Model for DESIRE (Diffusion Enhanced Silylated Resist) Process using Plasmask-150, Plasmask-200g and Plasmask 302U Resists;
• Development of Sensor Technology for Radiation Dosimetry Application;
• Using analytical techniques (FT-IR, UV/Visible, X-ray, SEM, TEM, FIB-SIM, ATM) for Thin-Films / Thick Films and Photoresists Materials Characterisation

 Bio & List of Journal & Conference Publications

Professor Khalil Arshak

Professor of Electronic Engineering
University of Limerick

Research Interests:

• Design of 40nm lines/spaces in SPR510 resist using statistical process control and simulation techniques with Intel Ireland. The process design involves exposure using electron-beam lithography, the silylation process and dry development in a magnetically enhanced reactive ion etcher.
• Development of phase shift mask technology for subhalf-micron lithography application with Intel Ireland.
• Development of two and three terminal thick film devices for telecommunication and power electronic applications. Development of a thick film planar transformer for DC-DC converters in conjunction with C & D Technologies / Power Convertibles Ltd., Shannon Ind. Est, Co. Clare, Ireland.
• Development of a multipurpose ASIC sensor with BMS Ireland, Limerick and an integrated gas flow sensor.
• Properties of thin (10-20nm) SiO2 and Ta2O5 films after treatment in MERIE for submicron applications with Bulgarian Academy of Sciences, Sofia, University of Ulster and Institute of Electron Technology, Warsaw, Poland.
• Development of integrated microelectronic gas sensing subsystems with Sheffield Hallam University, UK and Bulgarian Academy of Sciences, Sofia.

Bio